About Me

Electronic systems engineer with a lot of experience across the silicon chip development engineering domain. Most of my experience encompassed extremely elaborate design flow methodology implementations from front-end to back-end. Over the  last 15 years I have been heavily involved in full chip verification activities principally in the RF, Analog, and Digital domains. But on the whole, my professional experience has amounted to being a complete SoC developer with a lot of computer engineering skills in support.

Education

Brunel University of London 2000

Masters

Microelectronic Systems Design

DeepLearning.ai 2025

Deep Learning Specialisation

All the essential Deep Learning paradigms RNN/CNN/GNN algorithms, general AI and machine learning principles, data analysis/preparation, neural network model development, parameters/hyperparameters tuning, optimisation - neural network model cost/loss error minimisation, and AI project management. Independently exploring relevant DL aspects critical to advancing IC design methodologies involving analog circuit analysis/modelling surrogacy, verification strategies, simulation bottleneck negotiation and top-level simulation acceleration.

Work & Experience

A couple of UK companies as a perm employee, but mostly throughout Europe between 2005-25. 01/01/1970 - 01/01/1970

Mixed-Signal System-on-Chip Engineer - Verification

Plenty of experience in systems design/signal analysis, strong design verification - modelling, analog/RF circuits and UVM digital RTL, mixed-signal (analog + digital) circuit debug at many design abstraction levels of chip hierarchy. Lots of deep circuit and chip simulation, heuristic circuit optimisation experience and strong software skillset from RISC-V, assembly language to high level (Python/C++)

Skills/ Technologies

nano-electronics (RF, analog and digital)
50%
IT/Software
30%
AI/Deep Learning
20%